1. Field of the Invention
The present invention relates to a method for fabricating a transformer integrated with a semiconductor structure, and more particularly, to a method utilizing copper interconnection technology for fabricating a transformer.
2. Description of the Prior Art
It is known in the art that there is an ever-present demand for decreasing the sizes and geometries of electronic components. The demand for decreasing the size of consumer communication and information processing devices has resulted in a general trend in the market to integrate electronic components such as inductors and transformers on a chip.
Please refer to FIGS. 1-5 which are schematic drawings illustrating a method for fabricating a transformer provided by U.S. Pat. No. 6,727,138. In general, the transformer integrated in the semiconductor structure is fabricated in the back-end-of-the-line (BEOL). For example, the transformer is fabricated after completing the fabrication of the contact pads. As shown in FIG. 1, an integrated circuit structure 100 comprises a substrate 102, a top interconnection metal layer 104 formed by the copper interconnection technology, a protection layer 106, and a metal pad 108 formed on the top interconnection metal layer 104.
Please refer to FIGS. 2 and 3. A dielectric layer 110 is formed on the substrate 102. Then a via 112 corresponding to the metal pad 108 is sequentially formed by the photo-etching process (PEP) on the dielectric layer 110 and exposes the metal pad 108. And a copper-diffusion barrier layer 114 is formed on the bottom and the sides of the dielectric layer 110 and the via 112.
Thereafter, as shown in FIGS. 4 and 5, a primary winding layer 116, a passivation layer 118, and a secondary winding layer 120 filling the via 112 are successively formed on the copper-diffusion barrier layer 114, and then a transformer having a coil pattern and electrically connected to the metal pad 108 is obtained.
As abovementioned, the conventional method for fabricating a transformer integrated with a semiconductor structure is performed in back-end-of-the-line (BEOL), especially after completing the fabrication of the metal pad. Therefore the processes are not only complicated, but also increase the cost of manufacturing. Furthermore, as shown in FIG. 5, because the primary winding layer 116 and the secondary winding layer 120 are exposed to the environment, these metal layers are apt to be effected by the moisture and the particles outside, resulting in a poor electrical performance. To solve this problem, there are two main methods in the art: forming a protection layer to entirely cover the primary winding layer and the secondary winding layer after completing the fabrication of the transformer with another PEP performed to expose the metal pad; or encapsulating the chip bearing the transformer by a common mold compound.